The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2002

Filed:

Apr. 04, 2001
Applicant:
Inventors:

Alex Ignatiev, Houston, TX (US);

Naijuan Wu, Pearland, TX (US);

Shangqing Liu, Houston, TX (US);

E. Joseph Charlson, Houston, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract

An electrically operated, overwritable, multivalued, non-volatile resistive memory element is disclosed. The memory element includes a two terminal non-volatile memory device in which a memory film material is included, and a circuit topological configuration is defined. The memory device relates generally to a unique new electrically induced variable resistance effect, which has been discovered in thin films of colossal magnetoresistive (CMR) oxide materials. The memory material is characterized by: 1) the electrical control of resistance through the application of short duration low voltage electrical pulses at room temperature and with no applied magnetic field; 2) increase of the resistance or decrease of the resistance depending on the polarity of the applied pulses; 3) a large dynamic range of electrical resistance values; and 4) the ability to be set at one of a plurality of resistance values within said dynamic range in response to selected electrical input signals so as to provide said single cell with multibit/multivalued storage capabilities. The memory element includes a circuit topology to construct a ROM/RAM configuration. The features of the memory element circuit are: 1) the ability to set and then measure the resistance of the two terminal multi-valued memory devices with negligible effects of sampling voltage and current; and 2) the ability to step up or down the resistance value, i. e., to set one of multiple number of resistance states, with repeated applications of pulses of varying amplitude.

Published as:

Find Patent Forward Citations

Loading…