The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2002

Filed:

Dec. 30, 1999
Applicant:
Inventors:

Pablo M. Rodriguez, Burlingame, CA (US);

Alper Ilkbahar, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

An integrated circuit for measuring internal clock skew is provided. The integrated circuit includes a first controlled delay module, which is operable to receive one of a sampling clock signal and a sampled clock signal. The integrated circuit further includes a first flip-flop having a first input coupled to the first controlled delay module and a second input coupled to one of the sampling clock signal and said sampled clock signal. The first flip-flop is operable to generate an output based on skew between the sampled clock signal and the sampling clock signal.


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