The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2002

Filed:

Mar. 02, 2001
Applicant:
Inventors:

Robert M. Wallace, Richardson, TX (US);

Glen D. Wilk, New Providence, NJ (US);

Mark Anthony, Tampa, FL (US);

Dim-Lee Kwong, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18242 ;
U.S. Cl.
CPC ...
H01L 2/18242 ;
Abstract

An integrated circuit capacitor comprising a high permittivity dielectric and a method of forming the same are disclosed herein. In one embodiment, this capacitor may be used as a DRAM storage cell. For example, a DRAM storage node electrode may be formed of polysilicon. An ultrathin oxynitride passivation layer (e.g. less than 1 nm) is formed on this electrode by exposure of the substrate to NO. A tantalum pentoxide layer is formed over layer , followed by a cell plate . Passivation layer allows electrode to resist oxidation during deposition of layer , thus preventing formation of an interfacial oxide layer. A passivation layer formed by this method may typically be deposited with shorter exposure times and lower temperatures than nitride passivation layers.


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