The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2002
Filed:
Mar. 13, 2001
Jon Opsal, Livermore, CA (US);
Jingmin Leng, Fremont, CA (US);
Therma-Wave, Inc., Fremont, CA (US);
Abstract
A method is described for analyzing and characterizing parameters of a semiconductor wafer. In particular, an approach is described for characterizing the interface layer between a thin oxide film and a silicon substrate in order to more accurately determine the characteristics of the sample. The wafer is inspected and a set of measured data is created. This measured data is compared with theoretical data generated based on a theoretical set of parameters as applied to a model representing the physical structure of the semiconductor. The model includes an interface layer, between the film layer and the silicon substrate, which includes a representation of the electronic structure of the underlying substrate. In the preferred embodiment, the representation is a five peak, critical point model influenced by the electronic transitions of the underlying silicon substrate. An error minimization algorithm, such as a least squares fitting routine, is used to modify the theoretical parameters until the differences between the measured data and the theoretically derived data is minimized.