The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2002

Filed:

Dec. 13, 1999
Applicant:
Inventors:

Takashi Yunogami, Niiza, JP;

Kazuo Nojiri, Higashimurayama, JP;

Yuzuru Ohji, Nishitama, JP;

Sukeyoshi Tsunekawa, Iruma, JP;

Masahiko Hiratani, Akishima, JP;

Yuichi Matsui, Kokubunji, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/120 ;
U.S. Cl.
CPC ...
H01L 2/120 ;
Abstract

Described is a manufacturing method of an integrated circuit which uses a thin film such as platinum or BST as a hard mask upon patterning ruthenium or the like, thereby making it possible to form a device without removing the hard mask. In addition, the invention method makes it possible to interpose a protecting film such as platinum in order to prevent, upon removing a resist used for the patterning of the hard mask, an underlying ruthenium film or the like from being damaged.


Find Patent Forward Citations

Yunogami, Takashi. (2002). Method of manufacturing a semiconductor integrated circuit (U.S. Patent No. 6451665). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6451665

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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