The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2002

Filed:

Jan. 05, 1999
Applicant:
Inventors:

Amitava Chatterjee, Plano, TX (US);

Wei William Lee, Plano, TX (US);

Greg A. Hames, Dallas, TX (US);

Qizhi He, Plano, TX (US);

Maureen Hanratty, Dallas, TX (US);

Iqbal Ali, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1338 ;
U.S. Cl.
CPC ...
H01L 2/1338 ;
Abstract

A method of fabricating an improved gate structure that may be used in a transistor. A primary insulation layer ( ) may be formed adjacent a substrate ( ). A disposable gate ( ) may be formed adjacent the primary insulation layer ( ). An isolation dielectric layer ( ) may be formed adjacent the primary insulation layer ( ). The disposable gate ( ) may be removed to expose a portion of the primary insulation layer ( ). The exposed portion of the primary insulation layer ( ) may be removed to expose a portion of the substrate ( ). The primary insulation layer ( ) may be selectively removable relative to the isolation dielectric layer ( ). A gate insulator ( ) may be formed on the exposed portion of the substrate ( ). A gate ( ) may be formed adjacent the gate insulator ( ).


Find Patent Forward Citations

Loading…