The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2002

Filed:

Oct. 12, 1999
Applicant:
Inventors:

Qwai H. Low, Cupertino, CA (US);

Chok J. Chia, Cupertino, CA (US);

Ramaswamy Ranganathan, Saratoga, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
M05K 3/34 ;
U.S. Cl.
CPC ...
M05K 3/34 ;
Abstract

According to the present invention, a method for creating a package for a semiconductor die, the package comprising a flexible tape, comprises the following steps. A support with an opening has a plurality of arms extending through at a portion of the opening. For example, for a square opening, there may be eight arms, two extending from each side of the opening. The arms preferably form a “z” shape or some other shape with a transverse component. The flexible tape is then attached to the ends of the arms within the opening such that the flexible tape is supported by the arms. A die is attached to the flexible tape, the die is preferably covered with a molding compound, and the die/flexible tape assembly is scribed from the support, thereby creating an individual package.


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