The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2002

Filed:

Dec. 12, 2001
Applicant:
Inventors:

Wen-Cheng Chen, Hsinchu, TW;

Kuo-Ching Huang, Kaohsiung, TW;

Chen-Jong Wang, Hsin-Chu, TW;

Wen-Chuan Chiang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18244 ;
U.S. Cl.
CPC ...
H01L 2/18244 ;
Abstract

A process for fabricating a buried stack capacitor structure, to be used in a one transistor, RAM cell, has been developed. The process features formation of a self-aligned, ring shaped storage node opening, formed in a top portion of an silicon oxide filled, shallow trench shape, via a selective dry etch procedure. The selective dry etch procedure in combination with subsequent selective wet etch procedures, create bare portions of semiconductor substrate at the junction of the ring shaped storage node opening and the adjacent top surface of semiconductor, allowing a heavily doped region to be created in this region. The presence of the heavily doped region reduces the node to substrate resistance encountered when a storage node structure is formed in the ring shaped storage node structure, as well as on the overlying the heavily doped region.


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