Process for producing flash memory without mis-alignment of floating gate with field oxide

Abstract

A process for producing a memory structure is disclosed. According to the process, an insulating portion and a conductive portion are formed with substantially equal thickness, and arranged in an alternate way to be a field oxide structure and a floating gate structure. This can be achieved by applying a conductive layer first, creating a trench in the conductive layer, filling the trench with an insulating material, and polishing the resulting layer. Because the insulating portion is formed adjacent to the conductive portion by filling the insulating material in the trench adjacent to the conductive portion, the field oxide structure and the floating gate structure are self-aligned while forming. Accordingly, no mis-alignment occurs, and thus the integration of the device can be improved. On the other hand, owing to the substantially equal thickness of the field oxide structure and the floating gate structure, the coupling effect between the floating gate structure and the control gate structure overlying the field oxide and the floating gate structures is well controlled, and thus the voltage for a programming or an erasing operation can be reduced.