The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Jan. 18, 2000
Applicant:
Inventors:

Anthony J. Toprac, Austin, TX (US);

Paul Ackmann, Buda, TX (US);

Stuart E. Brown, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 3/126 ; G01N 3/700 ; G06F 1/900 ;
U.S. Cl.
CPC ...
G01R 3/126 ; G01N 3/700 ; G06F 1/900 ;
Abstract

The present invention provides for a method and an apparatus for implementing programmed latency for improved wafer-to-wafer uniformity. Semiconductor devices for wafer-by-wafer analysis are identified. At least one value of a controlled variable in the wafer-by-wafer analysis is identified. A trajectory of recipes for the identified semiconductor devices is created. A sequence analysis of wafer-to-wafer variations is performed using the trajectory of recipes upon the identified semiconductor devices. A latency control is performed in response to the sequence analysis. A feed-forward implementation of wafer-by-wafer latency control is performed using the trajectory of recipes upon the identified semiconductor devices.


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