Method for making a double-cylinder-capacitor structure for dynamic random access memory (dram)

Abstract

A method using a single masking step for making double-cylinder stacked capacitors for DRAMs which increases capacitance while eliminating erosion of an underlying oxide insulating layer when the masking step is misaligned is described. A planar silicon oxide (SiO ) first insulating layer is formed over device areas, and a first silicon nitride (Si N ) etch-stop layer is deposited, and openings are etched for capacitor node contacts. A first polysilicon layer is deposited to a thickness sufficient to fill the openings and to form an essentially planar surface. A second insulating layer is deposited and patterned to form portions with vertical sidewalls over the node contacts. A conformal second Si N layer is deposited and etched back to form spacers on the vertical sidewalls, and the first polysilicon layer is etched to the first Si N layer. The second insulating layer is selectively removed using HF acid while the first polysilicon and first Si N layers prevent etching of the underlying first SiO layer. A second polysilicon layer is deposited and etched back to form double-cylinder sidewalls for the capacitor bottom electrodes. The first and second Si N layers are removed in hot phosphoric acid. The capacitors are completed by forming an interelectrode dielectric layer on the bottom electrodes, and depositing a third polysilicon layer for top electrodes.