Method of fabricating a resistor and a capacitor electrode in an integrated circuit

Abstract

A semiconductor fabrication method is provided for fabricating a resistor and a capacitor electrode in an integrated circuit, which can help enhance the quality of the resultant integrated circuit. In this method, the first step is to form a polysilicon layer. Then, optionally, a first oxide layer is formed over the polysilicon layer. Next, a first ion-implantation process is performed on the entire polysilicon layer so as to convert it into a lightly-doped polysilicon layer with a first predefined impurity concentration. After this, a second ion-implantation process is performed solely on the predefined electrode part of the polysilicon layer so as to convert this part into a heavily-doped polysilicon layer with a second predefined impurity concentration higher than the first impurity concentration. Subsequently, a selective removal process is performed to remove selected parts of the lightly-doped part and the heavily-doped part of the polysilicon layer. Then, optionally, a second oxide layer is formed in such a manner as to cover the entire remaining part of the lightly-doped polysilicon layer and the entire remaining part of the heavily-doped polysilicon layer. Finally, the silicon nitride layers and the second oxide layer are removed. The remaining part of the lightly-doped polysilicon layer serves as the intended resistor, while the remaining part of the heavily-doped polysilicon layer serves as the intended capacitor electrode.