The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2002

Filed:

May. 11, 2001
Applicant:
Inventor:

Muh-Min Yih, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract

A wafer-level packaging process comprising: forming a patterned photoresist on a wafer covering a plurality of scribe lines and bump forming locations; forming a stress buffer layer on the regions not covered by the patterned photoresist; after removal of the patterned photoresist a plurality of first openings are defined in the stress buffer layer that also exposes the scribe lines; arranging either a stencil or a second patterned photoresist having a plurality of second openings over the wafer to cover the stress buffer layer and scribe lines, such that the second openings expose the first openings; filling a solder material in the openings; performing a reflow process, wherein according to the use of either the stencil or second photoresist, the reflow is respectively performed after or before the removal thereof. After dicing, the thus-packaged wafer can be directly connected onto an external carrier.


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