The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2002
Filed:
Aug. 25, 1999
Reima Laaksonen, Dallas, TX (US);
Robert Kraft, Plano, TX (US);
James B. Friedmann, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A process for forming a polysilicon line having linewidths below 0.23 &mgr;m. The layer of polysilicon ( ) is deposited over a semiconductor body ( ). A layer of bottom anti-reflective coating (BARC) ( ) is deposited over the polysilicon layer ( ). A resist pattern ( ) is formed over the BARC layer ( ) using conventional lithography (e.g., deep UV lithography). The BARC layer ( ) is etched with an etch chemistry of HBr/O using the resist pattern ( ) until the endpoint is detected. The BARC layer ( ) and resist pattern ( ) are then overetched using the same etch chemistry having a selectivity of approximately one-to-one between the BARC and resist. The overetch is a timed etch to control the linewidth reduction in the resist/BARC pattern. The minimum dimension of the pattern ( ) is reduced to below the practical resolution limit of the lithography tool. Finally, the polysilicon layer ( ) is etched using the reduced width pattern ( ).