The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2002

Filed:

Dec. 17, 1999
Applicant:
Inventors:

Konstantin Volodarsky, San Francisco, CA (US);

Boguslaw A. Nagorski, San Jose, CA (US);

Rimma Volodarsky, San Francisco, CA (US);

Douglas W. Young, Sunnyvale, CA (US);

Cyprian Uzoh, Milpitas, CA (US);

Homayoun Talieh, San Jose, CA (US);

Assignee:

Nutool, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C25B 9/00 ; C25C 7/00 ; C25D 1/700 ;
U.S. Cl.
CPC ...
C25B 9/00 ; C25C 7/00 ; C25D 1/700 ;
Abstract

The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.


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