The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2002

Filed:

Oct. 09, 1997
Applicant:
Inventor:

Shih-Wei Sun, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/131 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/131 ;
Abstract

A multilevel interconnect structure is formed which uses air as a dielectric between wiring lines and which is compatible with the presence of unlanded vias in the interconnect structure. A layer of carbon is deposited over an insulating surface and then a pattern for trenches is formed in the surface of the layer of carbon. Metal is deposited in the trenches and over the layer of carbon and then a chemical mechanical polishing process is used to define wiring lines. An ashing or etch back process is performed on the carbon layer to recess its surface below the surfaces of the wiring lines. An oxide capping layer is provided over the recessed surface of the carbon and the wiring lines, for example using HSQ and curing, and then the carbon layer is consumed through the capping layer using an oxidation process. Air replaces the sacrificial carbon layer during the consumption reaction. Next, a silicon nitride etch stop layer is provided over the surface of the capping layer and then an intermetal dielectric layer is provided. A via is formed by etching through the intermetal dielectric, stopping on the etch stop layer, and then etching through the etch stop layer and the capping layer in distinct processes. The via is filled with a metal plug and then second level wiring lines are formed.


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