The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2002

Filed:

Jul. 19, 1999
Applicant:
Inventors:

Kong-Beng Thei, Hsin-Chu, TW;

Kuei-Ying Lee, Hsin-Chu, TW;

Dun-Nian Yaung, Taipei, TW;

Shou-Gwo Wuu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/176 ;
Abstract

A method to form shallow trench isolations with reduced substrate defects by using a nitrogen anneal is achieved. A silicon substrate is provided. The silicon substrate is etched where not protected by a photoresist mask to form shallow trenches where shallow trench isolations are planned. A liner oxide layer is grown on the interior surfaces of the shallow trenches. The silicon substrate and the liner oxide layer are annealed to reduce or eliminate defects, dislocations, interface traps, and stress in the silicon substrate. An isolation oxide layer is deposited overlying the liner oxide layer and completely filling the shallow trenches. The isolation oxide layer is etched down to the top surface of the silicon substrate and thereby forms the shallow trench isolations. The integrated circuit device is completed.


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