The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2001

Filed:

Apr. 01, 1999
Applicant:
Inventors:

Vladimir Rodov, Redondo Beach, CA (US);

Wayne Y. W. Hsueh, San Jose, CA (US);

Paul Chang, Saratoga, CA (US);

Michael Chern, Cupertino, CA (US);

Assignee:

Advanced Power Devices, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1332 ;
U.S. Cl.
CPC ...
H01L 2/1332 ;
Abstract

A power rectifier having low on resistance, mass recovery times and low forward voltage drop. In a preferred embodiment, the present invention provides a power rectifier device employing a vertical device structure, i.e., with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common metallization. This provides a low V,path through the channel regions of the MOSFET cells to the source region on the other side of the integrated circuit. A thin gate structure is formed annularly around the pedestal regions on the upper surface of the device and a precisely controlled body implant defines the channel region and allows controllable device characteristics, including gate threshold voltage and V,. A parallel Schottky diode is also provided which increases the switching speed of the MOSFET cells. The present invention further provides a method for manufacturing a rectifier device which provides highly repeatable device characteristics and which can provide such devices at reduced cost. The active channel regions of the device are defined using pedestals in a double spacer, double implant self-aligned process. The channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer sidewall formation. Only two masking steps are required, reducing processing costs.


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