Process to separate the doping of polygate and source drain regions in dual gate field effect transistors

Abstract

The present invention is directed toward a method for independently doping the gate and the source-drain regions of a semiconductor device. The method is initiated by the provision. of a substrate having isolation regions and a thin insulating layer. Over the substrate is formed a polysilicon layer which is doped with a first type of dopant at a first doping level. Over the polysilicon layer is formed a conducting layer of material that can withstand temperatures of 1000° C., and over the conducting layer is formed a blocking layer. The polysilicon layer, the conducting layer and the blocking layer are etched to form a gate stack. Source-drain regions are subsequently doped with a second type of dopant at a second doping level. Source-drain regions are activated in a 1000° C. heat cycle, and, subsequently, TiSi,is formed on the source-drain regions. Contacts are then formed. The blocking layer on the gate stack need not be removed, which aids in minimizing substrate damage and in prevention of shorting a source-drain contact region to the substrate.