The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2001

Filed:

Oct. 25, 1999
Applicant:
Inventors:

Wen-Tsing Tzeng, Taichung, TW;

Yue-Feng Chen, Hsinchu, TW;

Kau-Jan Wang, Chia-I, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1302 ; H01L 2/1461 ;
U.S. Cl.
CPC ...
H01L 2/1302 ; H01L 2/1461 ;
Abstract

A method is described for progressively forming a fuse access opening for laser trimming in an integrated circuit with improved control of dielectric thickness over the fuse. A dielectric layer is formed over the fuse and a polysilicon layer is then patterned over the fuse to form a first etch stop. An ILD layer is added and a second etch stop is formed in a first metal layer on the ILD layer over the first etch stop. The second etch stop serves to protect the ILD layer over the fuse from being etched by an ARC over etch during the via etching in a first IMD layer. A first portion of the laser access window is formed during the via etching of the first IMD layer. The second etch stop is then removed by the second metal patterning etch, exposing the ILD layer over the first etch stop at it's original thickness. A passivation layer is deposited and patterned to form access openings to bonding pads as well as to further open the laser access window to the first etch stop. The first etch stop prevents penetration of the subjacent insulative layer over the fuse, thereby maintaining a controlled uniform thickness of that layer. When the bonding pads are opened, including the removal of an ARC on their surface, the etchant conditions are changed to remove the etch stop and subsequently a portion of the subjacent insulative layer over the fuse leaving a precise and uniform thickness of dielectric material over the fuse. The process fits conveniently within the framework of an existing process and does not introduce any additional steps.


Find Patent Forward Citations

Loading…