The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2001
Filed:
Nov. 16, 1999
Dahcheng Lin, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
A method of manufacturing a crown-shaped DRAM capacitor. A silicon oxide layer and a silicon nitride layer are sequentially formed over a substrate. A conductive plug passing through the silicon oxide layer and the silicon nitride layer is formed. A first and a second dielectric layer are sequentially formed over the silicon nitride layer and the conductive plug. A first opening that exposes the conductive plug and a portion of the silicon nitride layer surrounding the plug is formed in the second and the first dielectric layer. A doped amorphous silicon layer conformal to the substrate profile is formed. The doped amorphous silicon layer above the second dielectric layer is removed. The second dielectric layer is next removed, and then hemispherical silicon grains (HSGs) are grown over the exposed surface of the doped amorphous silicon layer. The first dielectric layer is removed, and finally a third dielectric layer and a conductive layer are sequentially formed over the substrate.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile