The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2001

Filed:

Mar. 04, 1999
Applicant:
Inventor:

Te-Sheng Yang, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/3495 ;
U.S. Cl.
CPC ...
H01L 2/3495 ;
Abstract

A dual silicon chip package structure is described, whose first silicon chip is supported by special lead frame pins. The lead frame pins extend into the peripheral region of the first silicon chip so that the front surface of the first silicon chip can be attached to those lead frame pins. Bonding pads on the front surface of the first silicon chip are located around the central region. The backside of a second silicon chip is attached to the backside of the first silicon chip. Bonding pads on both the first silicon chip and the second silicon chip are connected to the lead frame using conductive wires. In addition, if the second silicon chip is smaller than the first silicon chip, the second silicon chip can sit with its backside on top of the front surface of the first silicon chip as well. In that case, the backside of the first silicon chip has to sit above the lead frame pins, and the bonding pads on the front surface of the first silicon chip has to be located around the peripheral region.


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