The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2001
Filed:
Dec. 18, 1998
John T. Sprietsma, Hillsboro, OR (US);
Steve Joy, Portland, OR (US);
Julie Scheyer-Furnanz, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A multi-layer printed circuit board includes power planes located on outer conductive layers. The outer conductive layers are patterned to accept circuitry, such as integrated circuits and surface mount devices. Mounting pads are provided on the outer conductive layers which include plated through vias for electrical interconnection with other conductive layers of the printed circuit board. To increase solderability, the plated through vias are located on the mounting pads such that they are covered by the circuit component mounted thereto. By locating the vias under the electrical components, such as surface mount capacitors, the quality of solder fillets is increased. To enhance heat dissipation, openings are provided in solder masks located on exterior surfaces of the outer conductive planes. These openings are located in the solder mask to expose the conductive plane. As such, the openings are located in areas where circuitry is not mounted to the printed circuit board.