Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents

Abstract

A transistor structure fabricated on thin SOI is disclosed. The transistor on thin SOI has gated n+ and p+ junctions, which serve as switches turning on and off GIDL current on the surface of the junction. GIDL current will flow into the floating body and clamp its potential and can thus serve as an output node. The transistor can function as an inverter. The body (either n-well or p-well) is isolated from the n+ or P+ “GIDL switches” by a region of opposite doping type, i.e., p-base and n-base. The basic building blocks of logic circuits, e.g., NAND and NOR gates, are easily implemented with such transistors on thin SOI wafers. These new transistors on thin SOI only need contacts and metal line connections on the V,and V,. The connection of fan-outs (between the output and input) can be implemented by capacitor coupling. The transistor structure and operation is useful for highperformance, low-voltage, and low-power VLSI circuits on SOI wafers.