The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Jan. 25, 2000
Applicant:
Inventors:

Chien-Ping Huang, Hsinchu Hsien, TW;

Wei-Chen Tseng, Feng-Yuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/3495 ; H01L 2/328 ; H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/3495 ; H01L 2/328 ; H01L 2/348 ;
Abstract

A semiconductor package structure having universal lead frame and heat sink comprises a chip, a lead frame, a heat sink, a bonding wire, and a molding compound. The leads of the lead frame approaches toward the center portion of the lead frame in order to adapt to various sizes of the chip. The heat sink is mounted on and connected to the leads of the lead frame, and the periphery of the heat sink overlaps the front end of the leads wherein the dimension of the heat sink is not smaller than the size of the chip. The chip is disposed on the heat sink that is also functioned as die pad. The chip is electrically connected to the leads by a bonding wire that is designed to be the shortest. An “electrically insulative, and thermally conductive layer” is employed for bonding the heat sink to the lead frame. A molding compound is employed to encapsulate the chip, a portion or the whole piece of the heat sink, the leads of the lead frame, and the bonding wires that arc electrically connected between the chip and the leads.


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