The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Oct. 20, 2000
Applicant:
Inventors:

Kenneth Patrick Reilich, Ramona, CA (US);

Ronald Allen Norell, Oceanside, CA (US);

Elvira Widyani Preecha, San Diego, CA (US);

Joel Elwood Wing, Escondido, CA (US);

Lorraine Lo-Lan Wing, Escondido, CA (US);

Assignee:

Unisys Corporation, Blue Bell, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/166 ; H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/166 ; H01L 2/144 ;
Abstract

An integrated circuit package is processed by a grinding step, a dissolving step, and a disintegrating step. The grinding step grinds an IC-chip completely off of a substrate, and it also grinds a first portion of a filler layer and a first portion of a set of solder balls which attach the IC-chip to the substrate. This leaves a partial filler layer and partial solder balls on the substrate. The dissolving step dissolves the partial filler layer off of the substrate after the grinding step; and the disintegration step disintegrates at least part of each partial solder ball by subjecting the partial solder balls on the substrate to ultrasonic vibration after the dissolving step. These steps leave the substrate with small solder mounds that can be easily attached to another IC-chip with another set of solder balls.


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