The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2001
Filed:
Nov. 30, 1998
Applicant:
Inventors:
Gary B. Bronner, Stormville, NY (US);
Greg Costrini, Hopewell Junction, NY (US);
Carl J. Radens, Poughkeepsie, NY (US);
Rainer F. Schnabel, Wappingers Falls, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract
A process of forming a wiring in a semiconductor interlayer dielectric, include simultaneously patterning a via and a slotted line in the interlayer diectric, simultaneously etching the via and the slotted line, and simultaneously filling the via and the slotted line with a metal.
Quick Actions:
Bronner, Gary. (2001). Slotted damascene lines for low resistive wiring lines for integrated circuit (U.S. Patent No. 6265308). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6265308
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile