The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2001
Filed:
Jun. 07, 1999
Tsvetanka Zheleva, Chapel Hill, NC (US);
Darren B. Thomson, Cary, NC (US);
Scott A. Smith, Centerville, OH (US);
Kevin J. Linthicum, Angier, NC (US);
Thomas Gehrke, Carrboro, NC (US);
Robert F. Davis, Raleigh, NC (US);
North Carolina State University, Raleigh, NC (US);
Abstract
A sidewall of an underlying gallium nitride layer is laterally grown into a trench in the underlying gallium nitride layer, to thereby form a lateral gallium nitride semiconductor layer. Microelectronic devices may then be formed in the lateral gallium nitride layer. Dislocation defects do not significantly propagate laterally from the sidewall into the trench in the underlying gallium nitride layer, so that the lateral gallium nitride semiconductor layer is relatively defect free. Moreover, the sidewall growth may be accomplished without the need to mask portions of the underlying gallium nitride layer during growth of the lateral gallium nitride layer. The defect density of the lateral gallium nitride semiconductor layer may be further decreased by growing a second gallium nitride semiconductor layer from the lateral gallium nitride layer. In one embodiment, the lateral gallium nitride layer is masked with a mask that includes an array of openings therein. The lateral gallium nitride layer is then grown through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. In another embodiment, the lateral gallium nitride layer is grown vertically. A plurality of second sidewalls are formed in the vertically grown gallium nitride layer to define a plurality of second trenches. The plurality of second sidewalls of the vertically grown gallium nitride layer are then laterally grown into the plurality of second trenches, to thereby form a second lateral gallium nitride layer. Microelectronic devices are then formed in the gallium nitride semiconductor layer.