The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2001
Filed:
Feb. 22, 1999
Applicant:
Inventors:
Ping Chen, Round Rock, TX (US);
Navakanta Bhat, Austin, TX (US);
Paul G. Y. Tsui, Austin, TX (US);
Daniel T. K. Pham, Austin, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18234 ;
U.S. Cl.
CPC ...
H01L 2/18234 ;
Abstract
A first dielectric layer (,) is formed over a semiconductor device substrate. A resist layer (,) is then patterned to expose portions of the first dielectric layer (,). Portions of the first dielectric layer (,) are removed to expose portions of the semiconductor device substrate (,). The resist layer (,) is then removed. The semiconductor device substrate is cleaned without using a fluorine-containing solution and a second dielectric layer (,) is formed overlying the semiconductor device substrate.