The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2001
Filed:
Oct. 22, 1999
Applicant:
Inventors:
Yinon Degani, Highland Park, NJ (US);
Thomas Dixon Dudderar, Chatham, NJ (US);
King Lien Tai, Berkeley Heights, NJ (US);
Assignee:
Agere Systems Inc., Berkeley Heights, NJ (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/148 ;
U.S. Cl.
CPC ...
H01L 2/148 ;
Abstract
The specification describes methods for manufacturing thin tiles for IC packages using thinning techniques. The method includes the step of thinning the IC devices in chip form. This is achieved at the final stage of assembly where the chips are flip-chip bonded to the substrate and the backside of the chips is exposed for thinning. Using this approach, final chip thickness of the order of 2-8 mils can be produced and overall package thickness is dramatically reduced.