The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2001
Filed:
Oct. 01, 1997
Michael G. Henderson, San Jose, CA (US);
Carlton G. Amdahl, Fremont, CA (US);
Dennis H. Smith, Fremont, CA (US);
Don Agneta, Hill, CA (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
A system for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the system comprises a processor-to-PCI bridge connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the system comprises two or more processor-to-PCI bridges connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding resistance to single point failures.