Method for forming a delamination resistant multi-layer dielectric layer for passivating a conductor layer

Abstract

Within a method for forming a microelectronic fabrication, there is first provided a substrate. There is then formed over the substrate a blanket aluminum containing conductor layer. There is then formed over the blanket aluminum containing conductor layer a masking layer. There is then etched, while employing a plasma etch method, the blanket aluminum containing conductor layer to form a patterned aluminum containing conductor layer while employing the masking layer as an etch mask layer, where the plasma etch method employs an etchant gas composition comprising at least one fluorine containing etchant gas and at least one halogen containing etchant gas other than a fluorine containing etchant gas. There is then formed contacting the patterned aluminum containing conductor layer a conformal dielectric liner layer. There is then formed upon the conformal dielectric liner layer a spin-on-glass (SOG) planarizing layer. Finally, there is then thermally annealed the spin-on-glass (SOG) planarizing layer to form a thermally cured spin-on-glass (SOG) planarizing layer. By employing the at least one fluorine containing etchant gas in conjunction with the at least one halogen containing etchant gas other than the fluorine containing etchant gas within the etchant gas composition for forming from the blanket aluminum containing conductor layer the patterned aluminum containing conductor layer, there is attenuated a delamination of the thermally cured spin-on-glass (SOG) planarizing layer from the conformal dielectric liner layer.