The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2001
Filed:
Jul. 07, 1999
Applicant:
Inventors:
Chun-Lung Chen, Tainan Hsien, TW;
Hsi-Mao Hsiao, Hsinchu, TW;
Hsi-Chin Lin, Hsinchu Hsien, TW;
Wen-Hua Cheng, Hsinchu Hsien, TW;
Assignee:
United Microelectronics Corp., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ;
U.S. Cl.
CPC ...
H01L 2/1336 ;
Abstract
A method of fabricating a MOS transistor. A substrate has a gate formed thereon and a LDD is formed in the substrate beside the gate. A spacer is formed on the sidewall of the gate. A sacrificial layer is formed over the substrate to cover the gate and the spacer. A portion of the sacrificial layer is removed to expose a portion of the spacer. The exposed spacer is removed, such that a portion of the gate sidewall is exposed. The sacrificial layer is removed. A source/drain region is then formed in the substrate beside the spacer.