The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2001

Filed:

May. 15, 1998
Applicant:
Inventors:

Fusen E. Chen, Dallas, TX (US);

Fu-Tai Liou, Carrollton, TX (US);

Timothy E. Turner, Roanoke, TX (US);

Che-Chia Wei, Plano, TX (US);

Yih-Shung Lin, Carrollton, TX (US);

Girish Anant Dixit, Dallas, TX (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
Abstract

Interlevel contacts in semiconductor integrated circuits are fabricated by formation of a contact opening through an insulating layer. A layer of refractory metal, or refractory metal alloy, is deposited over the surface of the integrated circuit chip. An aluminum layer is then deposited at a significantly elevated temperature, so that an aluminum/refractory metal alloy is formed at the interface between the aluminum layer and the refractory metal layer. Formation of such an alloy causes an expansion of the metal within the contact opening, thereby filling the contact opening and providing a smooth upper contour to the deposited aluminum layer.


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