The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2001
Filed:
Oct. 09, 1997
Shih-Wei Sun, Taipei, TW;
Abstract
An integrated circuit including a dielectric layer over a substrate and a via formed through the dielectric layer exposing a conductive region in the substrate. A first conductive layer is formed over the dielectric layer and within the via. Etching through a portion of the first conductive layer is carried out to form first and second individual conducting regions separated from one another by a first exposed portion of the dielectric layer having a first width. A second conductive layer is formed over the first and second individual conducting regions, over the first exposed portion of the dielectric layer, and filling any unfilled via regions. Etching the second conducting layer is carried out to expose a portion of the dielectric layer for a second time and to V form first and second wiring lines. The first wiring line includes the first conducting region and first remaining portions of the second conductive layer, and the second wiring line including the second conducting region and second remaining portions of the second conducting layer. The presence of the remaining portions of the second conductive layer as part of the wiring lines effectively decreases the size of the gap between the wiring lines and promotes subsequent gap-filling.