The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2001

Filed:

Oct. 21, 1998
Applicant:
Inventors:

Mark I. Gardner, Cedar Creek, TX (US);

Thomas E. Spikes, Jr., Round Rock, TX (US);

H. Jim Fulford, Jr., Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/900 ; H01L 2/906 ; H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/900 ; H01L 2/906 ; H01L 2/176 ;
Abstract

A method for fabricating an integrated circuit is presented wherein a trench is patterned in a field region of a semiconductor substrate. The trench is defined within the semiconductor substrate by a trench floor and trench sidewalls. A trench surface boundary is defined where the trench sidewalls intersect the upper surface of the semiconductor substrate. The trench may be filled with a trench fill material. A protective layer is then formed above the trench. The protective layer covers the trench and laterally extends above the semiconductor substrate at least a first distance beyond the trench surface boundaries.


Find Patent Forward Citations

Gardner, Mark. (2001). Integrated circuit isolation structure employing a protective layer and method for making same (U.S. Patent No. 6239476). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6239476

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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