The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2001
Filed:
Nov. 10, 1999
Joseph H. Salmon, Placerville, CA (US);
Navneet Dour, Fair Oaks, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A power-up circuit for a multi-voltage chip having two or more electrostatic devices coupled in series between first and second power supply lines, with a first electrostatic device being coupled between a node and the second power supply line. The power-up circuit comprising a MOS transistor coupled between the first power supply line and the node. A voltage divider coupled between the first and second power supply lines controls the conductivity of the MOS transistor. An internal node of the voltage divider is coupled to the gate of the MOS transistor and the divider is configured such that the internal node rises in potential following power-up to regulate the conductivity of the MOS transistor. The MOS transistor changes from a high conducting state to a low conducting state responsive to an increase in potential of the second power supply line following power-up.