The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2001
Filed:
Mar. 31, 1998
Applicant:
Inventors:
Salvador Palanca, Folsom, CA (US);
Vladimir Pentkovski, Folsom, CA (US);
Steve Tsai, Rancho Cordova, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/212 ;
U.S. Cl.
CPC ...
G06F 1/212 ;
Abstract
A processor is described. The processor includes a decoder to decode instructions and a circuit, in response to a decoded instruction, to detect an incoming load instruction that misses a cache, allocate a buffer to service the incoming load instruction, and issue a bus request to load the data in the buffer without accessing said cache.
Palanca, Salvador. (2001). Method and apparatus for implementing non-temporal loads (U.S. Patent No. 6223258). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6223258
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile