The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2001

Filed:

Dec. 11, 1998
Applicant:
Inventors:

Yong-Jun Hu, Boise, ID (US);

Pai Hung Pan, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1425 ; H01L 2/13205 ; H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/1425 ; H01L 2/13205 ; H01L 2/144 ;
Abstract

A method of controlling stresses in thin films that are deposited over semiconductor device substrates. During anneal process steps, grain growth of the film creates stresses in that can damage or destroy it. The stresses lead to warping and bowing and ultimately to film cracking which undermines desired low resistivity. The present invention imparts thermal stability to thin films by grain boundary stuffing (GBS) of preselected elements that resist film grain changes that cause the stresses. GBS implants the elements into the thin film at desired depths, but above the film-substrate interface, sufficient to prevent or lessen destructive grain growth. GBS provides for structural film stability required during severe thermal cycles that occur during subsequent processing of semiconductor devices.


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