The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2001
Filed:
Jul. 20, 1993
Tony T. Phan, Austin, TX (US);
Tom J. Goodwin, Austin, TX (US);
John K. Lowell, Round Rock, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An improved sputter etching technique is provided for substantially preventing or reducing plasma etch damages associated with sputter etching. The plasma etch technique can utilize a semiconductor wafer having at least one diode formed within an inactive region of the wafer near the outer periphery of the wafer. The diode is capable of preventing charge transfer or arcing between the grounded anode and the p-channel gate region. By placing a diode within the inactive region of the wafer, problems such as gate oxide breakdown, threshold voltage skew, flat-band voltage skew, etc. can be minimized or substantially reduced. Alternatively, a standard wafer not having an implanted or diffused diode can be utilized to obtain similar beneficial results provided the sputter etch anode is retrofitted to include a diode placed between the anode and the ground terminal. Similar to the diode placed on the wafer, the retrofitted anode is used to provide a depletion region for preventing charge transfer therethrough.