The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2001
Filed:
Sep. 14, 1998
William T. Chou, Cupertino, CA (US);
Solomon I. Beilin, San Carlos, CA (US);
Michael Guang-Tzong Lee, San Jose, CA (US);
Michael G. Peters, Santa Clara, CA (US);
Wen-Chou Vincent Wang, Cupertino, CA (US);
Fujitsu Limited, , JP;
Abstract
A method of fabricating a multi-layer interconnected substrate structure. The inventive method includes forming a multi-layer structure from multiple, pre-fabricated power and/or signal substrates which are laminated together. A drill is then used to form a via through the surface of a ring-type pad down to a desired depth in the multi-layer structure. The via hole is cleaned and then filled with a conductive material. The via so formed between two or more substrates is self-aligned by using the ring pad(s). This contributes to an increased signal routing density compared to conventional methods.