The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2001
Filed:
Dec. 04, 1998
United Semiconductor Corp., Hsinchu, TW;
Abstract
A method of fabricating a DRAM capacitor. A conductive layer and an amorphous silicon layer are formed on a substrate having a dielectric layer. The amorphous silicon layer and the conductive layer are etched to form a region of a capacitor to expose a portion of the dielectric layer. An opening with a profile having a wider upper portion and a narrower lower portion is formed within the conductive layer, and through the opening, the dielectric layer is then etched through to form a node contact window to expose the substrate. An amorphous silicon spacer is formed on the sidewall of conductive layer of the region of the capacitor and fills the node contact window. A selective HSG-Si, a dielectric layer and a polysilicon layer are formed to achieve the fabrication of the capacitor. The conductive layer, the amorphous silicon layer and the HSG-Si serve as a lower electrode of the capacitor and the polysilicon layer serves as an upper electrode of the capacitor.