The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2000

Filed:

Apr. 26, 1999
Applicant:
Inventors:

Su Tao, Kaohsiung, TW;

Kuang-Lin Lo, Kaohsiung Hsien, TW;

Kuang-Chun Chou, Kaohsiung Hsien, TW;

Shih-Chih Chen, Kaohsiung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257676 ; 257686 ; 257692 ; 257693 ; 257777 ; 257779 ; 257784 ; 257786 ; 361790 ; 361813 ;
Abstract

A stacked chip assembly generally includes a first chip, a second chip and a lead frame. The lower surface of the first chip is pasted onto the lower surface of the second chip by an adhesive film so as to form a stacked chip body. The stacked chip body is disposed on the lead frame. Bonding pads of the upper surface of the first chip are interconnected to the upper surface of the inner leads of the lead frame by bonding wires. Bonding pads of the upper surface of the second chip are interconnected to the lower surface of the inner leads of the lead frame by bonding wires. Therefore, the first chip and the second chip are simultaneously interconnected to an external circuit devices through the lead frame.


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