The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2000

Filed:

May. 20, 1997
Applicant:
Inventors:

Akira Nagai, Hitachi, JP;

Masatsugu Ogata, Hitachi, JP;

Shuji Eguchi, Ibaraki-ken, JP;

Masahiko Ogino, Hitachi, JP;

Toshiaki Ishii, Hitachi, JP;

Masanori Segawa, Hitachi, JP;

Hiroyoshi Kokaku, Hitachi, JP;

Ryo Moteki, Hitachi, JP;

Ichiro Anjoh, Koganei, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B / ;
U.S. Cl.
CPC ...
428114 ; 428327 ; 442 59 ; 442 70 ; 442 74 ; 174148 ; 174258 ; 361746 ; 257673 ; 257675 ; 257734 ; 257737 ;
Abstract

A laminate capable of mounting semiconductor elements thereon; comprising an insulating layer which is constituted by a resin portion of sea-island structure and a woven reinforcement. The resin portion of sea-island structure is, for example, such that a resin as islands are dispersed in a resin as a matrix. Thus, the insulating layer exhibits a coefficient of thermal expansion of 3.0.about.10 (ppm/K) in a planar direction thereof and a glass transition temperature of 150.about.300 (.degree.C.). Owing to these physical properties, thermal stresses which the laminate undergoes in packaging the semiconductor elements thereon can be reduced, so that the connections of the laminate with the semiconductor elements can be made highly reliable.


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