The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2000

Filed:

Jan. 26, 1999
Applicant:
Inventors:

Takeshi Nogami, Sunnyvale, CA (US);

Axel Preusse, Sunnyvale, CA (US);

Valery Dubin, Portland, OR (US);

Assignee:

AMD, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25B / ;
U.S. Cl.
CPC ...
204280 ; 204288 ; 204289 ;
Abstract

A method and apparatus for fabricating electrochemical copper interconnections between the component parts of an integrated circuit on a semiconductor device. A cathodic platter is provided that includes contact pins that contact the surface of a semiconductor wafer at predetermined locations during the electrochemical deposition process. The contact pins are arranged on the cathodic platter so that when placed on the surface of the semiconductor wafer the contact pins surround the perimetrical edges of each respective semiconductor device on the semiconductor wafer. Once the semiconductor wafer is properly positioned on the cathodic platter, a copper conductive layer can be electrochemically and uniformly deposited on the surface of the semiconductor device.


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