The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2000
Filed:
May. 07, 1998
Kuo Ching Huang, Kaohciung, TW;
Wen-Chuan Chiang, Hsin-Chu, TW;
Cheng-Ming Wu, Tzekuan, TW;
Yu-Hua Lee, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A method of forming a deep contact by forming a dielectric layer 20 over a semiconductor structure 10. A main point is that the hard mask 30 is removed after the plug 52 is formed. A hard mask layer 30 is formed over the dielectric layer 20. A contact photoresist layer 36 is formed over the hard mask layer 30. The hard mask layer 30 is etched through the contact photoresist opening 39 to form a contact hard mask opening 41 exposing the dielectric layer 20. The dielectric layer 20 is etched using a high density plasma etch process using the contact photoresist layer 36 and the hard mask layer 30 as an etch mask forming a contact hole 40 in the dielectric layer 20. The contact photoresist layer 36 is removed. A metal layer 50 is formed filling the contact hole 40 and covering over the hard mask layer 30. The metal layer 50 is etched back forming a plug 52 filling the contact hole 40. Now, the hard mask layer 30 is removed. The removal of the hard mask 30 after the metal layer 50 deposition: (a) prevents the contact hole 40 from being contaminated from photoresist and other contamination formed during the hard mask 30 removal steps; and (b) creates a plug 52 that does not have a recess.