The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2000
Filed:
Oct. 05, 1998
Toshikazu Nakamura, Kawasaki, JP;
Masato Matsumiya, Kawasaki, JP;
Satoshi Eto, Kawasaki, JP;
Masato Takita, Kawasaki, JP;
Ayako Kitamoto, Kawasaki, JP;
Kuninori Kawabata, Kawasaki, JP;
Hideki Kanou, Kawasaki, JP;
Masatomo Hasegawa, Kawasaki, JP;
Toru Koga, Kawasaki, JP;
Yuki Ishii, Kawasaki, JP;
Fujitsu Limited, Kanagawa, JP;
Abstract
This invention is a memory device with a structure that has eliminated the logic circuit using I/O mask signal DQM from within the critical path from the clock CLK to the predecoder and column decoder for generating column selection signal CL. The logic circuit using I/O mask signal DQM within the critical path for generating column selection signals is eliminated, and the time from when the clock is supplied until the column selection signal is generated is made as short as possible. On the other hand, to make an I/O mask possible during burst write mode, drive control of the write amplifier is performed based on I/O mask signal DQM. Specifically, activation of the write amplifier is prohibited or allowed in response to the I/O mask signal DQM.