The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2000
Filed:
Jul. 23, 1997
Masami Sakuraba, Tokyo, JP;
Masami Kimura, Tokyo, JP;
Junji Nakamura, Tokyo, JP;
Masaya Takahara, Tokyo, JP;
Dowa Mining Co., Ltd., Tokyo, JP;
Abstract
A metal-ceramic composite circuit substrate having a ceramic substrate and a metal plate joined to at least one main surface of the ceramic substrate, the rate of voids formed on at least a joint surface at a semiconductor mounting portion of the metal plate per unit surface area being not more than 1.49%. The diameter of void formed on at least the joint surface at a semiconductor mounting portion of the metal plate is not larger than 0.7 mm. The surface undulation of the ceramic substrate is not more than 15 .mu.m/20 mm measured by a surface roughness tester in case that the ceramic substrate is joined directly to the metal plate. The metal plate is joined to the ceramic substrate through a brazing material containing at least one active metal selected from a group consisting of Ti, Zr, Hf and Nb. The ceramic substrate is at least one kind of ceramic substrate selected from a group consisting of Al.sub.2 O.sub.3, AlN, BeO, SiC, Si.sub.3 N.sub.4 and ZrO.sub.2.