The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2000
Filed:
Oct. 28, 1998
Sheng-Hsing Yang, Hsinchu, TW;
Kuan-Yu Fu, Hsinchu, TW;
United Microelectronics Corp., Hsinchu, TW;
Abstract
A method for forming high voltage devices is provided. A P-type semiconductor substrate is provided. An oxide layer is formed on the P-type semiconductor substrate. A first P-well and a second P-well are formed in the P-type semiconductor substrate. A first N-well is formed in the second p-well and a second N-well is formed in the first P-well. A field oxide layer on the second N-well and a gate oxide layer are formed on the P-type substrate. A polysilicon layer is formed and defined as a gate on the gate oxide layer across a portion of the field oxide layer and aportion of the first N-well. A source region is formed in the first N-well and a drain region is formed in the second N-well. A P.sup.+ -type doped region is formed between the substrate and the source region across a part of the first N-well within the second P-well.