The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2000
Filed:
May. 29, 1998
Shou-Gwo Wuu, Hsinchu, TW;
Lung Chen, Hsin-Chu, TW;
Dun-Nian Yaung, Taipei, TW;
Yi-Miaw Lin, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
The present invention provides a method of inter-poly oxide (IPO) layer underlying a polysilicon resistor in a memory product. The IPO layer 15 is formed by a modified low pressure SACVD-O.sub.3 -TEOS process that gives the IPO layer a smoother surface and good planarization. This IPO layer gives the overlying polysilicon resistors a more uniform resistance. The method begins by providing a semiconductor structure 10. Next, in an important step, an inter-poly oxide (IPO) layer 11 is formed using low pressure ozone assisted sub-atmospheric chemical vapor deposition (SACVD O.sub.3 -TEOS) process at a pressure between about 20 and 150 torr. A polysilicon resistor 15 is then formed on said inter-poly oxide (IPO) layer. The memory device is completed by forming passivation and conductive layers thereover.